The invention relates to a circuit, comprising a network of channels and synchronization circuits for coordinating the timing of operations of asynchronously operating sub-circuits which are connected to a periphery of the network, each channel being coupled between an own pair of synchronization circuits which are arranged to execute successive handshakes together, in each handshake a first and a second synchronization circuit of the own pair successively sending one another, via the channel, an attention signal and an acknowledge signal, at least one synchronization circuit in said circuit being coupled between a first and a second one of the channels and being arranged to start a handshake on the second channel upon reception of the attention signal on the first channel, and to generate an acknowledge signal on the first channel in response to the completion of said handshake, all synchronization circuits in said network being connected to one another by the channels, either directly or via other synchronization circuits, so that the handshakes can propagate to the sub-circuits through the network.
An asynchronously operating circuit of this kind is known from the article "Asynchronous Circuits for Low Power: A DCC Error Corrector", by K. van Berkel, R. Burgess, J. Kessels, M. Roncken, F. Schalij and A. Peeters in IEEE design and test of computers Vol. 11 (1994), No. 2, pp. 22 to 32 (see also "A Fully Asynchronous Low-Power Error Corrector for the DCC Player" by the same authors in IEEE Journal of solid state circuits, December 1994, Vol. 29 No. 12, pp. 1429-1439).
The network forms part of an asynchronous signal processing circuit. The network provides coordination of the timing of the operations of various sub-circuits of the signal processing circuit. For example, registers are coupled to a part of the synchronization circuits. The network then ensures that the contents of the registers are not replaced before they have been taken over by other circuits.
The coordination of the timing means that a second sub-circuit may commence a second operation only after a first sub-circuit has completed a first operation. The first sub-circuit itself may commence a further operation only after the second sub-circuit has completed the second operation. In an asynchronous circuit this is achieved by exchanging a handshake between the first and the second sub-circuit. This handshake involves an attention signal which is applied to the second sub-circuit by the first sub-circuit when the first operation is ready. The handshake also involves an acknowledge signal which is applied to the first sub-circuit by the second sub-circuit after completion of the second operation. It is only after it has received the acknowledge signal that the first sub-circuit may apply a new attention signal to the second sub-circuit.
Completion of the first operation will often be a condition for the start of operations in a plurality of sub-circuits. The start of the second operation may also be dependent on the completion of operations in a plurality of sub-circuits.
In that case the timing is coordinated by means of the network. The synchronization circuits ensure the completion of a handshake from one sub-circuit with several sub-circuits or the reception of handshakes from different sub-circuits. For example, there are synchronization circuits which generate a new attention signal in each of two channels in response to an attention signal and which, after reception of an acknowledge signal, generate an acknowledgement of the original attention signal in each of these channels. The handshakes in two channels can also be forcibly coordinated in succession by such synchronization circuits.
The channels via which the handshakes are exchanged utilize four-phase signaling in conformity with said publication. To this end, two conductors are used per channel. The attention signal commences with a potential level transition on a first conductor. The acknowledge signal commences with a potential level transition on a second conductor. After this transition, the potential on the first conductor returns to its original level so as to signify that the acknowledge signal has been received. Finally, the potential on the second conductor returns to its original level so as to signify that a new attention signal may be issued.
The four-phase handshake requires a minimum time: each of the four potential transitions involved requires some time. This minimum time is a critical property of the circuit, notably because the minimum times accumulate in a network of synchronization units in which the handshake must propagate to and fro through the network. Furthermore, two conductors are required so that, for example a handshake between different integrated circuits requires each time two IC pins per channel.
From Japanese published Patent Application No. 62-95654 a pair of latches is known which is connected via a number of conductors for data and via a control conductor. The latches indicate the fact that the data on the conductors for data is valid and the fact that the data has been latched (so that it can be removed from the connection) by way of mutually opposed transitions in a potential level on the control conductor.
U.S. Pat. No. 5,142,632 discloses a circuit with a number of clocked control modules which exchange instructions and execution messages under the control of semaphores. Each semaphore is activated and de-activated by mutually opposed transitions in the potential level on a conductor.
It is inter alia an object of the invention to reduce the minimum time required for a handshake. It is another object of the invention to limit the number of conductors per channel.